This application relates to integrated circuit testing.
In a typical integrated circuit testing system a sequence of test patterns (a “test sequence”) is applied to the pins of a device under test (DUT). Many different types of test patterns may be used to test different logic sections contained with a particular DUT, for example, Scan patterns, Functional patterns, Algorithmic patterns and Analog patterns. Some types of test patterns are applied to a DUT pin in a serial fashion (e.g., scan patterns) and others are applied to a set of pins in parallel (e.g., functional patterns, analog patterns and algorithmic patterns). Depending on the architecture of the DUT, a test sequence may include outputting a combined test pattern, i.e., outputting more than one type of test pattern at the same time to different pins of a DUT.
During a test sequence a DUT may output test “results” from an output pin. Therefore, a testing system may include one or more input channels connected to a DUT to receive test results during a test sequence.